Asst. Prof. AHMET UNUTULMAZ

Publication Network

Articles 8

1. A Novel Analog-Computing-in-Memory Architecture with Scalable Multi-Bit MAC Operations and Flexible Weight Organization for DNN Acceleration

UNUTULMAZ A.

Electronics (Switzerland) , vol.14, no.20, 2025 (SCI-Expanded, Scopus)

2. A novel low-hardware-cost scan chain architecture resilient to scanSAT attack

Tiryakioğlu F., UNUTULMAZ A., Çiçek İ., TANGEL A.

Integration , vol.103, 2025 (SCI-Expanded)

3. A Novel Dynamic Clock Generator Circuit for the Threshold Logic Gate

Unutulmaz A.

Gazi University Journal of Science Part A: Engineering and Innovation , vol.12, no.1, pp.61-71, 2025 (Peer-Reviewed Journal)

4. A Generalized Multiple-Valued FPGA Architecture based on Improved T-Gate Circuit

UNUTULMAZ A., Ünsalan C.

IEEE Access , vol.13, pp.156486-156496, 2025 (SCI-Expanded)

5. Implementation and Applications of a Ternary Threshold Logic Gate

UNUTULMAZ A., ÜNSALAN C.

Circuits, Systems, and Signal Processing , vol.43, no.2, pp.1192-1207, 2024 (SCI-Expanded)

6. Foto-Maskeler

UNUTULMAZ A., KAYDIRMA H., SARI E.

BİLGEM TEKNOLOJİ DERGİSİ , no.11, pp.26-30, 2021 (Non Peer-Reviewed Journal)

7. On the convex formulation of area for slicing floorplans

Unutulmaz A., Dundar G., Fernandez F. V.

INTEGRATION-THE VLSI JOURNAL , vol.50, pp.74-80, 2015 (SCI-Expanded)

8. Template coding with LDS and applications of LDS in EDA

Unutulmaz A., Dundar G., Fernandez F. V.

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING , vol.78, no.1, pp.137-151, 2014 (SCI-Expanded)

Papers Presented at Peer-Reviewed Scientific Conferences 8

1. Maske Boyut Ölçümleri ile Maske Yazıcı Performansı ve Krom Aşındırma Süreci Analizi

UNUTULMAZ A.

2018 Conference on Electrical and Electronics Engineering (ELECO), Bursa, Turkey, 30 November 2018, (Full Text) Sustainable Development

2. User dependent aging prediction model for automotive controllers with power electronics

MALIPATLOLLA S., UNUTULMAZ A., HELMS D., NEBEL W.

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Thessaloniki, Greece, 25 September 2017, (Full Text)

3. Analysis of NBTI Effects on High Frequency Digital Circuits

UNUTULMAZ A., HELMS D., EILERS R., METZDORF M., KACZER B., NEBEL W.

2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 14 March 2016, (Full Text)

4. A two-step layout-in-the-loop design automation tool

UNUTULMAZ A., DÜNDAR G., FERNANDEZ F. V.

2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), Grenoble, France, 07 June 2015, (Full Text)

5. Area Optimization on Fixed Analog Floorplans Using Convex Area Functions

UNUTULMAZ A., DÜNDAR G., FERNANDEZ F. V.

2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 18 March 2013, (Full Text)

6. LDS based tools to ease template construction

UNUTULMAZ A., DÜNDAR G., FERNANDEZ F. V.

2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Sevilla, Spain, 19 September 2012, (Full Text)