Timing Measurement Built-In Self Test (BIST) for System on Chip (SoC)

Abas M. A. , Russell G., Kinniment D. J.

8th WSEAS International Conference on Microelectronics, Nanoelectronics, Optoelectronics, İstanbul, Türkiye, 30 Mayıs - 01 Haziran 2009, ss.17-18 identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Basıldığı Şehir: İstanbul
  • Basıldığı Ülke: Türkiye
  • Sayfa Sayıları: ss.17-18


This paper presents two high-resolution timing measurement BIST for digital SoC applications, namely: Two-Delay Interpolation Method (TDIM) and Time Amplifier. The two schemes are combined to produce a completely new design for BIST time measurement which offers two main advantages: a low range of timing measurement which has never been achieved before, and a small size of layout occupying 0.2 mm(2) or equivalent to 3020 transistors. These two features are undoubtedly compatible with present high-speed SOC design architectures. Measurement technique for three common types of Jitter were studied and explained to justify the capabilities of the schemes.